Ideal Power has been granted a patent for a layout that reduces current crowding at endpoints in a semiconductor device. The device includes an emitter region in the shape of an obround with hemispherical ends, and a base region positioned within the obround. The gaps between the ends of the obround and the base region are greater than the radius by more than the manufacturing tolerance. GlobalData’s report on Ideal Power gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Ideal Power, Smart energy mgmt systems was a key innovation area identified from patents. Ideal Power's grant share as of September 2023 was 55%. Grant share is based on the ratio of number of grants to total number of patents.
Patent granted for a semiconductor device layout to reduce current crowding
A recently granted patent (Publication Number: US11777018B2) describes a semiconductor device with specific design features. The device includes an emitter region in the shape of an obround with parallel sides, each having a hemispherical end. Within the obround, there is a base region with a first end and a second end, parallel to and centered between the parallel sides. The first end is spaced apart from the first hemispherical end by a gap greater than the radius by more than a manufacturing tolerance, and the second end is spaced apart from the second hemispherical end by a similar gap.
Additionally, the semiconductor device includes a base contact that is electrically coupled to the base region through a base window. The base contact has a length parallel to the base length, and the closest terminus to the first end is spaced apart from the first end by a setback distance that is at least equal to the radius.
The patent also mentions that the first gap can be at least 50% longer than the radius, or even 100% longer than the radius. Similarly, the setback distance can be at least 50% longer than the radius, or 100% longer than the radius.
The semiconductor device can further include a bidirectional double-base bipolar junction transistor, with a lower side comprising an emitter region and a base region. The base region is P-type, while the emitter region is N-type.
In addition, the device may have a trench of dielectric material surrounding the base region. The trench has specific dimensions, with a depth ranging from 10 microns to 15 microns and a width ranging from 3 microns to 5 microns.
Overall, this granted patent describes a semiconductor device with specific design features, including the shape of the emitter region, the gaps between the regions, the base contact configuration, and the presence of a trench of dielectric material. These features contribute to the functionality and performance of the device, particularly in the context of bidirectional double-base bipolar junction transistors.
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GlobalData, the leading provider of industry intelligence, provided the underlying data, research, and analysis used to produce this article.
GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.
